Bus And Lcd Module Interfacing Essay Research
Bus And Lcd Module Interfacing Essay, Research Paper
Introduction In this lab we learned how to utilize two different beginnings to command an LCD faculty. The two beginnings were both hooked to the LCD at the same clip. An enable line was used to take which beginning the LCD received the information from. Design Description Our first measure in this design was to deduce the equations for the counter. Information was to be sent from the computing machine to the PAL through a buffer. The PAL contained the equations to command the LCD faculty. The end products of the PAL were connected to LCD inputs. The stroboscope end product from the parallel port buffer was besides connected to the PAL. Another input, which was connected to either land or Vcc, was connected to the PAL. Along with the stroboscope input and the clock, it controlled the enable line of the LCD. A D reversal was used to command the busy line of the parallel port. The stroboscope line from the parallel port was connected to this input. The Q-bar end product of the reversal was so connected to the busy line of the parallel port. Consequence
s and Deviations
Our first measure when we got to lab was to plan the PAL. Once this was done we hooked up our circuit. First we tested the circuit with the computing machine as the input. This worked mulct. We so set the enable lines so that the brassy memory was our beginning of input. When we turn the circuit on there was no consequence. We checked the inputs and the enable lines and everything was hooked right. We so checked the PAL bit and found that there was an mistake when we programmed the bit. We changed french friess and programmed our new PAL. We hooked the bit to the circuit and tested it. We received the right message on the LCD, so the circuit worked. Conclusions We can reason from the lab that we can at the same time utilize two separate beginnings of input to command one interface. This information is evidently utile for other designs. We can utilize this when linking devices to the parallel ports of a computing machine. Using the information from this lab, we could take which of the devices sent information to the computing machine and when the computing machine received it.
